trivia CD4060BC

• (Simulation speed) Fast model
• !!! Fixed to Spice Global GND
• integral for external Clk only !!!
• using Ti-s Data sheet acquired from Harris Semiconductor SCHS049C − Revised October 2003 v.

Test/Result uses 2x(CD4003/4013 to pad for missing outputs - inverting outputs not implemented but for φ̅₀̅)

Internals (barely noticeable on schematic -- the p9 & p10 use noninverting output buffers CD4060jf4V.asc -- not shown below)

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[Eop]