Sunday, April 5, 2015

Adjusting the adjustable voltage regulator

The goal as in trivia is to gain more stability and precision while keeping the design robust . . .


9V ± 1.8µV , 300/646mA (max.load/SC.supply current)
-- the stability (ringing(OpAmp-s e.c.)) + SC condition are a question marks here


((Simple with SC don't care /!\)) 9V + 0.6 ± 2.6mV , 300/687mA


((Simple SIPMOS with SC handling)) 9V + 4 ± 475 µV , 300/687mA


((BJT alternate of the above)) 9V - 48 ± 255.6µV , 300/56.7(398)mA (max.load/SC.supply current.average(.peak))


((feature test for FET switching)) 9V - 7 ± 13mV , 346/706(CuLm+)mA , 23.7kHz (here for err. compare)
-- the main targets were the inductor&frequency versus load&error (the current limit is a quick fit -- feature test)

[EoP] (XT kogu aeg on mingi vitustus selle küljendamisega -- ma korjan mittevajalikud reavahed maha - aga voila! - peale save´imist on nad kuskilt tagasi tekkinud (teksti ja pildi vahele topitakse <BR> tag´id - et kui on huvi lõpmatuseni oma tekstiga jantida ÕööÖ×ØÛÜÚÝ♒☣☠☦☯ ))

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